1. Technical Field of the Invention
The present invention relates to the field of data storage and, more particularly, to a magnetic tunnel junction device memory cell architecture.
2. Description of Related Art
Magnetoresistive Random Access Memory (MRAM) is a high-speed, low-voltage, high-density, nonvolatile memory in which a bit of information is stored into a magnetic tunnel junction (MTJ) structure through the application of magnetic fields and is retrieved from the MTJ by measuring its resistance. MRAM's advantages over other technologies include the combination of fast reads and writes, nonvolatility, near-infinite cycling capability, full bit alterability, and a simple cell structure.
MTJs are sandwiches of two ferromagnetic (FM) layers separated by a thin insulating layer. Particularly useful MTJ structures are those in which one of the ferromagnetic layers is pinned by exchange bias to an antiferromagnetic layer. For MRAM applications an MTJ structure is designed to have two stable magnetic states, corresponding to parallel and antiparallel orientation of the FM layers in the MTJ device. More specifically, the MTJ material stack is generally composed of two magnetic layers separated by a thin dielectric barrier. A layer of antiferromagnetic material with strong exchange coupling, such as FeMn or IrMn, is placed in contact with the bottom magnetic layer, pinning it in one direction. This layer is separated from the next magnetic layer by a thin layer of Ru, creating a synthetic antiferromagnet. The strong exchange between the magnetic layers in the synthetic antiferromagnet structure fixes the magnetic polarization of the fixed layer in one direction and prevents the fixed layer from switching during write operations. A read circuit is used to obtain the state of the MTJ device by assessing the MTJ resistance given the fact that the MTJ device behaves as a variable resistor with two discrete resistance values dependent on the aforementioned relative orientation of the free magnet to the pinned magnet.
An integrated memory cell has an extensive fabrication process for manufacturing the MTJ and its associated circuits for writing to the MTJ and circuits for reading the MTJ. As with most integrated processes, lower cost can be accomplished by reducing the number of components, simplifying the fabrication process and/or reducing the memory cell surface area.